PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 53

• Manufacturer Part Number: PEF 20550 H V2.1
• Description: IC INTERFACE CTRLR PCM MQFP80
• Manufacturer: Infineon Technologies
• Series: ELIC®r

Specifications of PEF 20550 H V2.1

• Function: Line Card Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-SQFP
• Includes: Change Detection, Power-Up Reset Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF20550HV2.1XT; PEF20550HV21XP; SP000007794; SP000007795

address space of 32 bytes each. The data in the FIFOs can be managed by the CPU-
or a DMA-controller.
To enable the use of block move instructions, the top of FIFO-byte is selected by any
address in the reserved range.
The SACCO consists of the following logical blocks:
Figure 25
SACCO-Block Diagram (one channel)
2.2.7.2 Parallel Interface
All registers and the FIFOs are accessible via the ELIC parallel P-interface. The chip
select signal CSS selects the SACCO for read/write access. The FIFOs allocate an
Semiconductor Group
CSS
TxD# TSC# CxD#
XFIFO
WR
ELIC Parallel Interface
Protocol Support
Serial Interface
RD
R
53
ALE
AD 0-7
RFIFO
RxD#
INT
ITB05824
Functional Description
DRQR
DRQT
DACKN
HDC
HFS
PEB 20550
PEF 20550
01.96