PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 165

• Manufacturer Part Number: PEF 20550 H V2.1
• Description: IC INTERFACE CTRLR PCM MQFP80
• Manufacturer: Infineon Technologies
• Series: ELIC®r

Specifications of PEF 20550 H V2.1

• Function: Line Card Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-SQFP
• Includes: Change Detection, Power-Up Reset Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF20550HV2.1XT; PEF20550HV21XP; SP000007794; SP000007795

RME
RPF
4.7.3
Access in demultiplexed
Access in multiplexed
Reset value: 00
Note: This interrupt is only generated in interrupt mode (not in DMA-mode).
XPR
Semiconductor Group
bit 7
P-interface mode:
P-interface mode:
RME
Interrupt Status Register (ISTA_A/B)
Receive Message End.
A message of up to 32 bytes or the last part of a message greater then
32 bytes has been received and is now available in the RFIFO. The message
is complete! The actual message length can be determined by reading the
registers RBCL, RBCH. RME is not generated when an extended HDLC-
frame is recognized in auto-mode (EHC interrupt).
In DMA-mode a RME-interrupt is generated after the DMA-transfer has been
finished correctly, indicating that the processor should read the registers
RBCH/RBCL to determine the correct message length.
Receive Pool Full.
A data block of 32 bytes is stored in the RFIFO. The message is not yet
completed!
Transmit Pool Ready.
A data block of up to 32 bytes can be written to the XFIFO.
RPF
H
0
XPR
read
read
165
0
address: (Ch-A/Ch-B): 20
address: (Ch-A/Ch-B): 40
Detailed Register Description
0
0
PEB 20550
PEF 20550
H
H
bit 0
/60
/C0
H
H
0
01.96