ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 102

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ATxmega64D3

Manufacturer Part Number
ATxmega64D3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64D3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11.3
8210B–AVR–04/10
Using the I/O Pin
Figure 11-1. General I/O pin functionality.
Use of an I/O pin is controlled from the user software. Each port has one Data Direction (DIR),
Data Output Value (OUT) that is used for port pin control. The Data Input Value (IN) register is
used for reading the port pins. In addition each pin has a Pin Configuration (PINnCTRL) register
for additional pin configuration.
Direction of the pin is decided by the DIRn bit in the DIR register. If DIRn is written to one, pin n
is configured as an output pin. If DIRn is written to zero, pin n is configured as an input pin.
When direction is set as output, the OUTn bit in OUT is used to set the value of the pin. If OUTn
is written to one, pin n is driven high. If OUTn is written to zero, pin n is driven low.
The IN register is used for reading the pin value. The pin value can always be read regardless of
the pin being configured as input or output, except if digital input is disabled.
I/O pins are tri-stated when reset condition becomes active, even if no clocks are running.
PINnCTRL
D
D
D
Q
OUTn
DIRn
INn
R
R
R
R
Synchronizer
Analog Input/Output
Q
Q
Q
D
Digital Input Pin
Q
R
D
Pull Enable
Pull Keep
Pull Direction
Input Disable
Wired AND/OR
Inverted I/O
XMEGA D
Pxn
102

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