ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 126

• Manufacturer Part Number: ATxmega64D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64D3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8210B–AVR–04/10
Figure 12-4. Period and Compare Double Buffering
When the CC channels is used for capture operation a similar Double buffering mechanism is
used, but the Buffer Valid flag is set on the capture event as shown in
the buffer and the corresponding CCx register acts like a FIFO. When the CC register is empty
or read, any contents in the buffer is passed to the CC register. The Buffer valid flag is passed to
the CCx Interrupt Flag (IF) which is them set and the optional interrupt is generated.
Figure 12-5. Capture Double Buffering
Both the CCx and CCxBUF registers are available in the I/O register address map. This allows
initialization and bypassing of the buffer register, and the double buffering feature.
UPDATE
"INT request"
"capture"
BV
IF
EN
EN
BV
CCxBUF
CCx
CNT
EN
EN
CNT
CCxBUF
=
CCx
"write enable"
"match"
"data"
Figure
XMEGA D
12-5. For capture
126