ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 253

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ATxmega64D3

Manufacturer Part Number
ATxmega64D3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64D3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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21.9.2
8210B–AVR–04/10
ACnMUXCTRL – Analog Comparator Control Register
• Bits 5:4 - INTLVL[1:0]: Analog Comparator Interrupt Level
These bits enable the Analog Comparator n Interrupt and select the interrupt level as described
in
rupt will trigger according to the INTMODE setting.
• Bit 3 - HSMODE: Analog Comparator High-Speed Mode Select
Setting this bit selects High-speed mode and clearing this bit to select Low-power mode.
• Bits 2:1 - HYSMODE[1:0]: Analog Comparator Hysteresis Mode Select
These bits select hysteresis according to
to device datasheet.
Table 21-2.
• Bit 0 - ENABLE: Analog Comparator Enable
Settings this bit enables the Analog Comparator n.
• Bits 7:6 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 5:3 - MUXPOS[2:0]: Analog Comparator Positive Input MUX Selection
These bits select which input to be connected to the positive input of Analog Comparator n,
according to
Table 21-3.
Bit
+0x02 / +0x03
Read/Write
Initial Value
”Interrupts and Programmable Multi-level Interrupt Controller” on page
HYSMODE[1:0]
MUXPOS[2:0]
000
001
010
011
100
00
01
10
11
Table
Analog Comparator n Hysteresis Settings
Analog Comparator n Positive Input MUX Selection
R
7
0
21-3.
Group Configuration
Group Configuration
6
R
0
LARGE
SMALL
PIN0
PIN1
PIN2
PIN3
PIN4
NO
-
R/W
5
0
MUXPOS[2:0]
Table
R/W
4
0
Description
Large hysteresis
No hysteresis
Small hysteresis
Reserved
21-2. For details on actual hysteresis levels refer
R/W
3
0
R/W
2
0
Description
MUXNEG[2:0]
Pin 0
Pin 1
Pin 2
Pin 3
Pin 4
R/W
1
0
95. The enabled inter-
XMEGA D
R/W
0
0
ACnMUXCTRL
253

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