ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 86

• Manufacturer Part Number: ATxmega64D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64D3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.4.5
8.4.6
8210B–AVR–04/10
Software reset
Program and Debug Interface Reset
Figure 8-6.
For information on configuration and use of the WDT, refer to the
page
The Software reset makes it possible to issue a system reset from software by writing to the
Software Reset bit in the Reset Control Register.The reset will be issued within 1-2 system clock
CPU cycles after writing the bit. It is not possible to execute any instruction from a software reset
is requested and until it is issued.
Figure 8-7.
The Program and Debug Interface reset contains a separate reset source that is used to reset
the device during external programming and debugging. This reset source is only accessible
from debuggers and programmers.
89.
SOFTWARE
CC
CC
Watchdog reset.
Software reset
1-2 2MHz
1-2 2MHz Cycle
Cycles
”WDT – Watchdog Timer” on
XMEGA D
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