ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 261

• Manufacturer Part Number: ATxmega64D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64D3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22.3.3.1
22.3.4
22.3.5
8210B–AVR–04/10
Serial transmission and reception
Serial Transmission
Characters
Three different characters, DATA, BREAK and IDLE, are used. The BREAK character is equal
to 12 bit-length of low level. The IDLE character is equal to 12 bit-length of high level. Both the
BREAK and the IDLE character can be extended beyond the bit-length of 12.
Figure 22-5. Characters and timing for the PDI Physical.
The PDI physical layer is either in Transmit (TX) or Receive (RX) mode of operation. By default
it is in RX mode, waiting for a start bit.
The programmer and the PDI operate synchronously on the PDI_CLK provided by the program-
mer. The dependency between the clock edges and data sampling or data change is fixed. As
illustrated in
is always set up (changed) on the falling edge of PDI_CLK, while data is always sampled on the
rising edge of PDI_CLK.
Figure 22-6. Changing and sampling of data.
When a data transmission is initiated (by the PDI Controller), the transmitter simply shifts the
start bit, data bits, the parity bit, and the two stop bits out on the PDI_DATA line. The transmis-
sion speed is dictated by the PDI_CLK signal. While in transmission mode, IDLE bits (high bits)
are automatically transmitted to fill possible gaps between successive DATA characters. If a col-
lision is detected during transmission, the output driver is disabled and the interface is put into a
RX mode waiting for a BREAK character.
Figure 22-6 on page
PD I_DATA
PDI_CLK
START
0
1
261, output data (either from the programmer or from the PDI)
2
Sam ple
3
1 BREAK character
1 DATA character
1 IDLE character
BREAK
4
IDLE
5
6
Sam ple
7
P
STOP
Sam ple
XMEGA D
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