SAM7S16 Atmel Corporation, SAM7S16 Datasheet - Page 112

• Manufacturer Part Number: SAM7S16
• Manufacturer: Atmel Corporation

Specifications of SAM7S16

• Flash (kbytes): 16 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 21
• Ext Interrupts: 21
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

19.2.4.3
112
SAM7S Series
Lock Bit Protection
Erase All operation is allowed only if there are no lock bits set. Thus, if at least one lock region is
locked, the bit LOCKE in MC_FSR rises and the command is cancelled. If the bit LOCKE has
been written at 1 in MC_FMR, the interrupt line rises.
When programming is complete, the bit FRDY bit in the Flash Programming Status Register
(MC_FSR) rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the inter-
rupt line of the Memory Controller is activated.
Two errors can be detected in the MC_FSR register after a programming sequence:
Lock bits are associated with several pages in the embedded Flash memory plane. This defines
lock regions in the embedded Flash memory plane. They prevent writing/erasing protected
pages.
After production, the device may have some embedded Flash lock regions locked. These locked
regions are reserved for a default application. Refer to the product definition section for the
default embedded Flash mapping. Locked sectors can be unlocked to be erased and then pro-
grammed with another application or other data.
The lock sequence is:
A programming error, where a bad keyword and/or an invalid command have been written in the
MC_FCR register, may be detected in the MC_FSR register after a programming sequence.
It is possible to clear lock bits that were set previously. Then the locked region can be erased or
programmed. The unlock sequence is:
A programming error, where a bad keyword and/or an invalid command have been written in the
MC_FCR register, may be detected in the MC_FSR register after a programming sequence.
The Unlock command programs the lock bit to 1; the corresponding bit LOCKSx in MC_FSR
reads 0. The Lock command programs the lock bit to 0; the corresponding bit LOCKSx in
MC_FSR reads 1.
Note:
• Programming Error: A bad keyword and/or an invalid command have been written in the
• Lock Error: At least one lock region to be erased is protected. The erase command has been
• The Flash Command register must be written with the following value:
• When locking completes, the bit FRDY in the Flash Programming Status Register (MC_FSR)
• The Flash Command register must be written with the following value:
• When the unlock completes, the bit FRDY in the Flash Programming Status Register
MC_FCR register.
refused and no page has been erased. A Clear Lock Bit command must be executed
previously to unlock the corresponding lock regions.
(0x5A << 24) | (lockPageNumber << 8 & PAGEN) | SLB
lockPageNumber is a page of the corresponding lock region.
rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the interrupt line
of the Memory Controller is activated.
(0x5A << 24) | (lockPageNumber << 8 & PAGEN) | CLB
lockPageNumber is a page of the corresponding lock region.
(MC_FSR) rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
Access to the Flash in Read Mode is permitted when a Lock or Unlock command is performed.
6175L–ATARM–28-Jul-11