SAM7S16 Atmel Corporation, SAM7S16 Datasheet - Page 40

• Manufacturer Part Number: SAM7S16
• Manufacturer: Atmel Corporation

Specifications of SAM7S16

• Flash (kbytes): 16 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 21
• Ext Interrupts: 21
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

10.10 PWM Controller
10.11 USB Device Port (Does not pertain to SAM7S32/16)
10.12 Analog-to-digital Converter
40
SAM7S Series
• Four channels, one 16-bit counter per channel
• Common clock generator, providing thirteen different clocks
• Independent channel programming
• USB V2.0 full-speed compliant, 12 Mbits per second.
• Embedded USB V2.0 full-speed transceiver
• Embedded 328-byte dual-port RAM for endpoints
• Four endpoints
• Suspend/resume logic
• 8-channel ADC
• 10-bit 384 Ksamples/sec. or 8-bit 583 Ksamples/sec. Successive Approximation Register
• ±2 LSB Integral Non Linearity, ±1 LSB Differential Non Linearity
• Integrated 8-to-1 multiplexer, offering eight independent 3.3V analog inputs
• External voltage reference for better accuracy on low voltage inputs
• Individual enable and disable of each channel
• Multiple trigger source
• Sleep Mode and conversion sequencer
• Four of eight analog inputs shared with digital signals
ADC
– One Modulo n counter providing eleven clocks
– Two independent linear dividers working on modulo n counter outputs
– Independent enable/disable commands
– Independent clock selection
– Independent period and duty cycle, with double buffering
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
– Endpoint 0: 8 bytes
– Endpoint 1 and 2: 64 bytes ping-pong
– Endpoint 3: 64 bytes
– Ping-pong Mode (two memory banks) for isochronous and bulk endpoints
– Hardware or software trigger
– External trigger pin
– Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
6175L–ATARM–28-Jul-11