SAM7S16 Atmel Corporation, SAM7S16 Datasheet - Page 368

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SAM7S16

Manufacturer Part Number
SAM7S16
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7S16

Flash (kbytes)
16 Kbytes
Pin Count
48
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
21
Ext Interrupts
21
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
31.6.3.4
368
SAM7S Series
Receiver Operations
OVRE
XRDY
_RHR
S_CR
Clock
Read
Write
Figure 31-12. Synchronous Mode Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register
(US_RHR) and the RXRDY bit in the Status Register (US_CSR) rises. If a character is com-
pleted while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is
transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit at 1.
Figure 31-13. Receiver Status
Rate
RXD
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Start
Clock
RXD
Bit
D0
D1
Start
D2
D3
D4
D0
D5
D6
D1
D7
Parity
Bit
D2
Stop
Bit
Start
D3
Bit
D0
D4
D1
D2
D5
D3
D4
D6
D5
D6
D7
D7
Parity
Bit
Parity Bit
6175L–ATARM–28-Jul-11
Stop
Bit
RSTSTA = 1
Stop Bit

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