X98014L128-3.3-Z Intersil, X98014L128-3.3-Z Datasheet - Page 6

IC VIDEO DIGITIZER TRPL 128MQFP

X98014L128-3.3-Z

Manufacturer Part Number
X98014L128-3.3-Z
Description
IC VIDEO DIGITIZER TRPL 128MQFP
Manufacturer
Intersil
Type
Video Digitizer, 3-Channel AFEr
Datasheet

Specifications of X98014L128-3.3-Z

Applications
LCD TV/Monitor
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X98014L128-3.3-Z
Manufacturer:
Intersil
Quantity:
3
Part Number:
X98014L128-3.3-Z
Manufacturer:
Intersil
Quantity:
1 900
Part Number:
X98014L128-3.3-Z
Manufacturer:
Intersil
Quantity:
10 000
Part Number:
X98014L128-3.3-Z
Manufacturer:
INTERSIL
Quantity:
20 000
R
R
P
S
/G
/G
DATACLK
DATACLK
HSYNC
HSYNC
Video In
P
S
Video In
G
R
B
/B
/B
Analog
Analog
P
P
P
HS
HS
[7:0]
[7:0]
[7:0]
P
S
[7:0]
[7:0]
OUT
OUT
IN
IN
P
P
0
0
6
Th HSYNC d
The HSYNC edge (programmable leading or trailing) that the DPLL is locked to.
The sampling phase setting determines its relative position to the rest of the AFE’s output signals
P
P
FIGURE 4. 24 BIT 4:2:2 OUTPUT MODE (FOR YUV SIGNALS)
1
1
t
HSYNCin-to-HSout
t
HSYNCin-to-HSout
P
P
2
2
8.5 DATACLK Pipeline Latency
8.5 DATACLK Pipeline Latency
The HSYNC edge (programmable leading or trailing) that the DPLL is locked to.
The sampling phase setting determines its relative position to the rest of the AFE’s output signals
FIGURE 3. 24 BIT OUTPUT MODE
(
P
P
= 7.5ns + (PHASE/64 +8.5)*t
3
3
= 7.5ns + (PHASE/64 +8.5)*t
bl l
P
P
X98014
4
4
di
Width and Polarity
Width and Polarity
P
P
Programmable
Programmable
5
5
t ili
PIXEL
P
) th t th DPLL i l
P
PIXEL
6
6
P
P
7
7
P
P
k d t
8
8
G
B
0
0
D
(U
(Y
0
o
o
P
P
)
)
9
9
G
R
1
1
D
(V
(Y
1
P
P
1
1
10
)
)
10
G
B
2
2
D
(U
(Y
2
P
P
2
2
11
)
)
11
March 8, 2006
D
3
P
P
FN8217.3
12
12

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