X98014L128-3.3-Z Intersil, X98014L128-3.3-Z Datasheet - Page 9

• Manufacturer Part Number: X98014L128-3.3-Z
• Description: IC VIDEO DIGITIZER TRPL 128MQFP
• Manufacturer: Intersil
• Type: Video Digitizer, 3-Channel AFEr

Specifications of X98014L128-3.3-Z

• Applications: LCD TV/Monitor
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Descriptions
XTALCLK
CLOCKINV
HSYNC
VSYNC
HSYNC
VSYNC
RGB
RGB
DATACLK
DATACLK
SYMBOL
XTAL
SOG
SOG
SADDR
RESET
XTAL
R
R
G
G
B
B
G
G
R
B
R
B
SDA
SCL
P
S
P
S
P
S
IN
IN
IN
IN
IN
IN
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
GND
GND
OUT
IN
IN
1
2
1
1
2
2
IN
IN
IN
IN
IN
OUT
1
2
1
2
1
1
2
2
IN
100-107
112-119
90-97
80-87
68-75
55-62
PIN
121
122
12
19
13
14
33
44
22
24
28
25
26
34
45
41
46
39
40
47
48
50
49
7
9
Analog input. Red channel 1. DC couple or AC couple through 0.1µF.
Analog input. Green channel 1. DC couple or AC couple through 0.1µF.
Analog input. Blue channel 1. DC couple or AC couple through 0.1µF.
Analog input. Ground reference for the R, G, and B inputs of channel 1 in the DC coupled configuration.
Connect to the same ground as channel 1's R, G, and B termination resistors. This signal is not used in the
AC-coupled configuration, but the pin should still be tied to GND
Analog input. Sync on Green. Connect to G
Digital input, 5V tolerant, 240mV hysteresis, 1.2kΩ impedance to GND
signal through a 680Ω series resistor.
Digital input, 5V tolerant, 500mV hysteresis. Connect to channel 1's VSYNC signal.
Analog input. Red channel 2. DC couple or AC couple through 0.1µF.
Analog input. Green channel 2. DC couple or AC couple through 0.1µF.
Analog input. Blue channel 2. DC couple or AC couple through 0.1µF.
Analog input. Ground reference for the R, G, and B inputs of channel 2 in the DC coupled configuration.
Connect to the same ground as channel 1's R, G, and B termination resistors. This signal is not used in the
AC-coupled configuration, but the pin should still be tied to GND
Analog input. Sync on Green. Connect to G
Digital input, 5V tolerant, 240mV hysteresis, 1.2kΩ impedance to GND
signal through a 680Ω series resistor.
Digital input, 5V tolerant, 500mV hysteresis. Connect to channel 2's VSYNC signal.
Digital input, 5V tolerant. When high, changes the pixel sampling phase by 180 degrees. Toggle at frame
rate during VSYNC to allow 2x undersampling to sample odd and even pixels on sequential frames. Tie to
D
Digital input, 5V tolerant, active low, 70kΩ pull-up to V
reset the X98014. This pin is not necessary for normal use and may be tied directly to the V
Analog input. Connect to external 23MHz to 27MHz crystal and load capacitor (see crystal spec for
recommended loading). Typical oscillation amplitude is 1.0V
Analog output. Connect to external 23MHz to 27MHz crystal and load capacitor (see crystal spec for
recommended loading). Typical oscillation amplitude is 1.0V
3.3V digital output. Buffered crystal clock output at f
system components.
Digital input, 5V tolerant. Address = 0x4C (0x98 including R/W bit) when tied low. Address = 0x4D (0x9A
including R/W bit) when tied high.
Digital input, 5V tolerant, 500mV hysteresis. Serial data clock for 2-wire interface.
Bidirectional Digital I/O, open drain, 5V tolerant. Serial data I/O for 2-wire interface.
3.3V digital output. Red channel, primary pixel data. 58K pulldown when three-stated.
3.3V digital output. Red channel, secondary pixel data. 58K pulldown when three-stated.
3.3V digital output. Green channel, primary pixel data. 58K pulldown when three-stated.
3.3V digital output. Green channel, secondary pixel data. 58K pulldown when three-stated.
3.3V digital output. Blue channel, primary pixel data. 58K pulldown when three-stated.
3.3V digital output. Blue channel, secondary pixel data. 58K pulldown when three-stated.
3.3V digital output. Data clock output. Equal to pixel clock rate in 24 bit mode, one half pixel clock rate in 48
bit mode.
3.3V digital output. Inverse of DATACLK.
GND
if unused.
X98014
IN
IN
DESCRIPTION
1 through a 0.01µF capacitor in series with a 500Ω resistor.
1 through a 0.01µF capacitor in series with a 500Ω resistor.
XTAL
D
. Take low for at least 1µs and then high again to
or f
XTAL
P-P
P-P
A
A
centered around 0.5V.
centered around 0.5V.
/2. May be used as system clock for other
.
.
A
A
. Connect to channel 1's HSYNC
. Connect to channel 2's HSYNC
D
supply.
March 8, 2006
FN8217.3