LMH1982SQE/NOPB National Semiconductor, LMH1982SQE/NOPB Datasheet - Page 24

• Manufacturer Part Number: LMH1982SQE/NOPB
• Description: IC CLK GEN MULTI RATE VID 32-LLP
• Manufacturer: National Semiconductor
• Type: Clock Generatorr

Specifications of LMH1982SQE/NOPB

• Applications: Displays, Projectors, Receivers
• Mounting Type: Surface Mount
• Package / Case: 32-LLP
• For Use With: LMH1982SQEEVAL - BOARD EVAL FOR LMH1982SQE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH1982SQETR

www.national.com
8.2 Read Sequence
Read sequences are comprised of two I
is the address access transfer, which consists of a write se-
quence that transfers only the address to be accessed. The
second is the data read transfer, which starts at the address
accessed in the first transfer and increments to the next ad-
dress per data byte read until a stop condition is encountered.
The address access transfer shown in Figure 7 consists of a
start pulse, the slave device address including the read/write
bit (a zero, indicating a write), then its ACK bit. The next byte
8.3 I
When the active low input I
will enable I
otherwise, the LMH1982 will not respond. For applications
with multiple LMH1982 devices on the same I
2
C Enable Control Pin
2
C communication via its fixed slave address;
2
C_ENABLE = 0, the LMH1982
FIGURE 7. LMH1982 Read Sequence – Address Access Transfer
FIGURE 8. LMH1982 Read Sequence – Data Read Transfer
2
C transfers. The first
FIGURE 6. LMH1982 Write Sequence
2
C bus, the I
2
C
24
is the address to be accessed, followed by the ACK bit and
the stop bit to indicate the end of the address access transfer.
The subsequent read data transfer shown in Figure 8 consists
of a start pulse, the slave device address including the read/
write bit (a one, indicating a read) and the ACK bit. The next
byte is the data read from the initial access address. Subse-
quent read data bytes will correspond to the next increment
address locations. Each data byte is separated from the other
data bytes by an ACK bit.
enable function can be useful for writing data to a specific
device(s) and for reading data from an individual device to
prevent bus contention. For single chip applications, the
I2C_ENABLE input can be tied to GND to keep the I
face enabled.
30052405
30052404
2
30052406
C inter-