LMH1982SQE/NOPB National Semiconductor, LMH1982SQE/NOPB Datasheet - Page 8

• Manufacturer Part Number: LMH1982SQE/NOPB
• Description: IC CLK GEN MULTI RATE VID 32-LLP
• Manufacturer: National Semiconductor
• Type: Clock Generatorr

Specifications of LMH1982SQE/NOPB

• Applications: Displays, Projectors, Receivers
• Mounting Type: Surface Mount
• Package / Case: 32-LLP
• For Use With: LMH1982SQEEVAL - BOARD EVAL FOR LMH1982SQE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH1982SQETR

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Clock Outputs (Pins 19, 20, 23, 24)
Symbol
Jitter
Jitter
t
t
t
|V
|V
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of T
T
D_TOF
V
D_SD
D_HD
V
I
I
I
A
t
OZ
t
OS
OZ
OD
OS
OD
OS
)/ θ
R
F
HD
SD
|
|
JA
. All numbers apply for packages soldered directly onto a PC Board.
Output Hi-Z Leakage Current
Rise Time
Fall Time
TOF Output Delay Time (Note
9)
27 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
67.5 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
74.176 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
74.25 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
148.35 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
148.5 MHz TIE Peak-to-Peak
Output Jitter (Note 12)
27 MHz Output Delay Time
(Note 13)
67.5 MHz Output Delay Time
(Note 13)
74.176 MHz Output Delay Time
(Note 14)
74.25 MHz Output Delay Time
(Note 14)
148.35 MHz Output Delay Time
(Note 14)
148.5 MHz Output Delay Time
(Note 14)
Differential Signal Output
Voltage (Note 15)
Common Signal Output Voltage
(Note 15)
|Change to V
Complementary Output States
(Note 15)
|Change to V
Complementary Output States
(Note 15)
Output Short Circuit Current
Output Hi-Z Leakage Current
Parameter
OD
OS
| for
| for
TOF output in Hi-Z mode, output pin
connected to V
15 pF load
15 pF load
Specified for any SD or HD format generated
from 27 MHz TOF clock (Note 10), outputs
initialized (Note 11), 15 pF load
HD_CLK = Hi-Z
HD_CLK = 74.176 MHz
HD_CLK = Hi-Z
HD_CLK = 74.176 MHz
SD_CLK = Hi-Z
SD_CLK = 27 MHz
SD_CLK = Hi-Z
SD_CLK = 27 MHz
SD_CLK = Hi-Z
SD_CLK = 27 MHz
SD_CLK = Hi-Z
SD_CLK = 27 MHz
SD_CLK = 27 MHz, Any valid output timing,
outputs initialized (Note 11)
SD_CLK = 67.5 MHz, 525i output timing (Note
10), outputs initialized (Note 11)
HD_CLK = 74.176 MHz, 1080i/59 output
timing (Note 10), outputs initialized (Note 11)
HD_CLK = 74.25 MHz, 1080i/50 output timing
(Note 10), outputs initialized (Note 11)
HD_CLK = 148.35 MHz, 1080p/59 output
timing (Note 10), outputs initialized (Note 11)
HD_CLK = 148.5 MHz, 1080p/50 output timing
(Note 10), outputs initialized (Note 11)
100Ω differential load
100Ω differential load
100Ω differential load
100Ω differential load
Differential clock output pins connected to
GND
Output clock in Hi-Z mode, differential clock
output pins connected to V
J(MAX)
, θ
JA
. The maximum allowable power dissipation at any ambient temperature is PD = (T
DD
Conditions
or GND
8
DD
or GND
(Note 6)
1.125
Min
247
(Note 5)
1.250
Typ
-0.6
350
0.4
1.5
1.5
4.5
1.5
4.5
23
40
40
50
55
65
40
50
60
70
45
55
2
4
6
1
(Note 6)
1.375
Max
454
10
50
50
24
10
J(MAX)
Units
|mV|
|mV|
|mA|
|μA|
|µA|
mV
ns
ns
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
V
–