KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 11

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KSZ8841-16

Manufacturer Part Number
KSZ8841-16
Description
Single-port Ethernet Mac Controller With Non-pci Interface
Manufacturer
Micrel Semiconductor
Datasheet

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0
November 2005
Micrel Confidential
Pin
Number
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Pin Name
INTRN
LDEVN
RDN
EECS
ARDY
CYCLEN
NC
DGND
VDDCO
VLBUSN
EEEN
P1LED3
EEDO
EESK
EEDI
Opd
Gnd
Ipd
Ipd
Type
Opd
Opd
Ipd
Opu
Ipd
Opd
P
Opd
Opd
Opd
Ipd
Ready signal to interface with synchronous bus for both EISA-like and VLBus-like
extend accesses.
For VLBus-like mode, the falling edge of this signal indicates ready. This signal is
synchronous to the bus clock signal BCLK.
For burst mode (32-bit interface only), the KSZ8841M drives this pin low to signal
wait states.
Interrupt
Active Low signal to host CPU to indicate an interrupt status bit is set, this pin need
an external 4.7K pull-up resistor.
Local Device Not
Active Low output signal, asserted when AEN is Low and A15-A4 decode to the
KSZ8841M address programmed into the high byte of the base address register.
LDEVN is a combinational decode of the Address and AEN signal.
Read Strobe Not
Asynchronous read strobe, active Low.
EEPROM Chip Select
This signal is used to select an external EEPROM device.
Asynchronous Ready
ARDY may be used when interfacing asynchronous buses to extend bus access
cycles. It is asynchronous to the host CPU or bus clock.
Cycle Not
For VLBus-like mode cycle signal; this pin follows the addressing cycle to signal the
command cycle.
For burst mode (32-bit interface only), this pin stays High for read cycles and Low for
write cycles.
No Connect
Digital IO ground
1.2V digital core voltage output (internal 1.2V LDO power supply output), this 1.2V
output pin provides power to VDDC, VDDA and VDDAP pins.
Note: Internally generated power voltage. Do not connect an external power supply
to this pin. This pin is used for connecting external filter (Ferrite bead and
capacitors).
VLBus-like Mode
Pull-down or float: Bus interface is configured for synchronous mode.
Pull-up: Bus interface is configured for 8-bit or 16-bit asynchronous mode or EISA-
like burst mode.
EEPROM Enable
EEPROM is enabled and connected when this pin is pull-up.
EEPROM is disabled when this pin is pull-down or no connect.
Port 1 LED indicator
See the description in pins 3, 4, and 5.
This pin is connected to DI input of the serial EEPROM.
EEPROM Serial Clock
A 4
Pin Function
EEPROM Data Out
EEPROM Data In
µ
s serial output clock to load configuration data from the serial EEPROM.
11
KSZ8841-16/32 MQL/MVL
Rev 1.3

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