KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 28

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Physical Data
The BIU supports an 8-bit, 16-bit, or 32-bit host standard data bus. Depending on the size of the
KSZ8841M supports 8-bit, 16-bit, or 32-bit data transfers
For example,
For a 32-bit system/host data bus, the KSZ8841M allows an 8-bit, 16-bit, and 32-bit data transfer (KSZ8841-32MQL).
For a 16-bit system/host data bus, the KSZ8841M allows an 8-bit and 16-bit data transfer (KSZ8841-16MQL).
For an 8-bit system/host data bus, the KSZ8841M only a
The KSZ8841M does not support internal data byte-swap but it does support internal data word-swap. This means that
the system/host data bus HD[7:0] must connect to both D[7:0] and D[15:8] for an 8-bit data bus interface. For a 16-bit data
bus, the system/host data bus HD[15:8] and HD[7:0] only need to connect to D[15:8] and D[7:0] respectively, and there is
no need to connect HD[15:8] and HD[7:0] to D[31:24] and D[23:16].
Table 2 describes the BIU sig
November 2005
Micrel Confidential
Signal
Common Signals
A[15:1]
AEN
BE3N, BE2N,
BE1N, BE0N
D[31:16]
D[15:0]
ADSN
LDEVN
DATACSN
Bus Size
Type
I
I
I
I/O
I/O
I
O
I
(1)
nal grouping.
Function
Address
Address Enable
Address Enable asserted indicates memory address on the bus for DMA
access and since the device is an I/O device, address decoding is only
enabled when AEN is Low.
Byte Enable
Note 1: BE3N, BE2N, BE1N and BE0N are ignored when DATACSN is low
because 32 bit transfers are assumed.
Note 2: BE2N and BE3N are valid only for the KSZ8841-32 mode, and are
No Connect for the KSZ8841-16 mode.
Data
For KSZ8841M-32 mode only.
Data
For both KSZ8841-32 and KSZ8841-16 Modes
Address Strobe
The rising edge of ADSN is used to latch A[15:1], AEN, BE3N, BE2N, BE1N
and BE0N.
Local Device
This signal is a combinatorial decode of AEN and A[15:4]. This A[15:4] is
used to compare against the Base Address Register.
Data Register Chip Select (For KSZ8841-32MQL Mode only)
This signal is used for central decoding architecture (mostly for embedded
BE0N
0
0
1
0
1
1
1
BE1N
0
0
1
1
0
1
1
28
llows an 8-bit data transfer (KSZ8841-16MQL).
BE2N
0
1
0
1
1
0
1
BE3N
0
1
0
1
1
1
0
Description
32-bit access
Lower 16-bit (D[15:0]) access
Higher 16-bit (D[31:16])
access
Byte 0 (D[7:0]) access
Byte 1 (D[15:8]) access
Byte 2 (D[23:16]) access
Byte 3 (D[31:24]) access
KSZ8841-16/32 MQL/MVL
physical data bus, the
Rev 1.3