KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 79

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Additional MIB Information
November 2005
Micrel Confidential
Offset
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
Exam
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
In the heaviest condition, the by
the co
MIB counters are designed as “r
T
hen
ple:
unters at lea
Counter Name
Rx1024to1522Octets
TxLoPriorityByte
Reserved
TxLateCollision
Tx
TxBroadcastPkts
TxMulticastPkts
TxUnicastPkts
TxDeferred
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Write to reg.
Read reg. IADR
Read reg. IADR4
PausePkts
st every 30 se
IACR with 0
5 (MIB c
(MIB c
Table 1
te counte
ead clear”. That is, these c
ounter value 31-16) // If bit 31 = 1, there was a counter overflow
ounter value 15-0)
conds.
Description
Total Rx packets (bad packets included) that are between 1024 and 1916 octets in
length
Tx lo-priority good octet count, including PAUSE packets
Reserved.
The number of times a collision is detected later than 512 bit-times into the Tx of a
packet
Nu
Tx
Tx
packets)
Tx good unicast packets
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy medium
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully T
Successfully Tx frames on a port for which Tx is inhibited
x1C0E (set indirect address and trigger a read MIB
2. Port 1 MIB Counte
mber of PAUSE frames tran
good broadcast packets (not incl
good multicast packets (not
r will overflow in 2 minutes. It is recommended that the software read all
x frames on a port for which Tx is inhibited by exactly one collision
79
// If bit 30 = 0, restart (re-read) from this register
rs Indirect Memory Offsets
ounters will be cleared after they are read.
smitted by a port
including error multicast packets or valid broadcast
uding error broadcast or valid multicast packets)
by more than one collision
counters operation)
KSZ8841-16/32 MQL/MVL
Rev 1.3