KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 52

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Bank 3 Wakeup Frame Control Register (0x0A): WFCR
This register holds control information programmed
Bit
15-8
7
6-4
3
2
1
0
Bank 4 Wakeup Frame 0 CRC0 Register (0x00): WF0CRC0
This register contains the expected CRC values of the Wake up frame 0 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard; it is taken over the bytes specified in the
wake up byte mask registers.
Bit
15-0
November 2005
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Default Value
0x00
0
0x0
0
0
0
0
Default Value
0x0000
R/W
RO
RW
RO
RW
RW
RW
RW
R/W
RW
Descrip
Reserved.
MPRXE
Magic P
When set, it enables the magic packet pattern detection.
When re
Reserve
WF3E
Wake up
When set, it enables the W
When reset, the W
WF2E
Wake up
When set, it enables the Wake up frame 2 pattern detection.
When re
WF1E
Wake up
When se
When reset, the Wake up frame 1 pattern detection is disabled.
WF0E
Wake up Frame 0 Enable
When set, it enables the Wake up frame 0 pattern detection.
When reset, the Wake up frame 0 pattern detection is disabled.
Description
WF0CRC0
Wake up Frame 0 CRC (lower 16 bits)
The expected CRC value of a Wake up frame 0 pattern.
acket RX Enable
tion
d.
set, the magic packet pattern detection is disabled.
set, the Wake up frame 2 pattern detection is disabled.
t, it enables the Wake up frame 1 pattern detection.
Frame 3 Enable
Frame 2 Enable
Frame 1 Enable
by the CPU to control the wake up frame function.
ake up frame 3 pattern detection is disabled.
52
ake up frame 3 pattern detection.
KSZ8841-16/32 MQL/MVL
Rev 1.3