KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 37

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KSZ8841-16

Manufacturer Part Number
KSZ8841-16
Description
Single-port Ethernet Mac Controller With Non-pci Interface
Manufacturer
Micrel Semiconductor
Datasheet

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0
CPU Interface I/O
The KSZ8841M provides an EISA-like, ISA-like, or VLBUS-like bus interface for the CPU to access its internal I/O
registers. I/O registers serve as the address that the microprocessor uses when communicating with the device. This is
used for configuring operational settings, reading or writing control, status
and writing through the packet data registers.
I/O Registers
Input/Output (I/O) registers are limited to 16 locations as required by most ISA bus-based systems; therefore, registers
are assigned to differen
used to change the bank in use.
The following I/O Space Mapping Tables apply to 8, 16 or 32-bit bus products. Depending on the bus interface used and
byte
o
November 2005
Micrel Confidential
peration. (The KSZ8841M is not limited to 8/16-bit performance and 32-bit read/write are also supported).
enable signals (BE[3:0]N control byte access), each I/O access can be performed as an 8-bit, 16-bit, or 32-bit
t banks. The last word of the I/O register locations (0xE - 0xF) is shared by all banks and can be
Registers
37
information, and transferring packets by reading
KSZ8841-16/32 MQL/MVL
Rev 1.3

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