KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 60

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

B
This register is programmed by the
T
Bank 17 RXQ Command Register
This register is programmed by the
buffer is read only by the host and t
Bank 17 TX Frame Data Pointer Register (0x04): TXFDPR
The value of this register determines the address to be accessed within the TXQ frame buffer. When the AUTO increment
i
T
word access.
November 2005
s set
Micrel Confidential
Bit
15-1
0
Bit
15-1
0
Bit
15
14
13-11
10-0
XQ
he cou
an
k 17 T
memo
, It wi
nte is incremente
ll automatically
XQ C
Default Value
-
0x0
Default Value
-
0x0
Default Value
-
0x0
-
0x000
ry is
r
ommand R
queued fo
in
d by
r tran
R/W
RO
RW
R/W
RO
RW
crem
R/W
RO
RW
RO
RW
egis
sm
ter
one
en
it.
he memory space is released.
t the pointer value on Write accesses to the data register.
Host CPU to issue release command to the RXQ. The
Host CPU to issue a transmit command to the TXQ. The presen
Description
Reserved
TXETF Enqueue TX Frame
When this bit is written as 1, the curre
for transmit.
Note: This bit is self-clearing after the frame is finished transmitting. The software
should wait for the bit to be cle
Description
Reserved.
RXRRF Release RX Frame
When this bit is written as 1, the current RX frame buffer is released.
Note: This bit is self-clearing after the frame memory is released. The software sh
wait for the bit to be cleared before process
Description
Reserved.
TXFPAI TX Frame Data Pointer Auto Increment
When this bit is set, the TX Frame data poi
accesses to the data register. T
for every word access, and by four for every doubleword access
When this bit is reset, the TX frame data pointer is manually controlled by user to
access the TX
Reserved.
TXFP TX Frame Pointer
TX Frame Pointer index to the Frame Data register for access.
This field reset to next available TX frame location when the TX Frame Data has
enqueued through the TXQ command register.
(0x00): TXQCR
(0x02): RXQCR
for every
byte access, by two for every word access, and by four for every double
frame location.
60
ared before setting up another new TX frame.
he increment is by one for every byte access, by two
nt TX frame prepared in the TX buffer is queued
nter register increments automatically on
ing new RX frame.
current frame in the RXQ frame
.
KSZ8841-16/32 MQL/MVL
t transmit frame in the
been
ould
Rev 1.3