KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 65

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Bank 18 Early Receive Register (
T
Bank 19 Multicast Table Register
The 64-bit multicast table is used for group address filtering. Th
C C circu
registers to be used, while the othe
Multicast table register 0.
Bank 19 Multicast Table Register
Multicast table register 1.
Bank 19 Multicast Table Register 2 (0x04): MTR2
Multicast table register 2.
November 2005
Micrel Confidential
Bit
15-8
7
6-5
4-0
Bit
15-0
Bit
15-0
Bit
15-0
his
R
regist
er
it c
Defau
-
0x0
-
0x
Default Value
0x0
Default Value
0x0
Default Value
0x0
specify the thr
1F
alculation res
lt Value
esho
ult th
R/W
RO
RW
RO
RW
R/W
RW
R/W
RW
R/W
RW
ld f
at
0x0A): ERXR
or early receive and inter
rs determine which bit within the register.
is based on 48-bit of DA input. The two most significant bits select one of the four
Description
Reserved.
RXEE Early Receive Enable
When this bit is set, the Early Receive function is enabled.
When this bit is cleared, normal ope
Reserved.
ERXTH Early Receive Threshold
The threshold for Early Receive and Interrupt. Specified in unit of 64-byte. Whenever
the number of bytes written in memory for the presently received packet exceeds the
threshold, early receive s
if its interrupt is enabled.
When early receive is enabled, setting this field to 0 is invalid, and the hardw
behavior is unknown.
Description
MTR0 Multicast Table 0
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cl
Note: When th
all multicast
Description
MTR0 Multicast Table 1
When the app
hashing functi
When the a
Note: When the receive all (RXR
all multicast addresses are received regardless of the multic
Description
MTR0 Multicast Table 2
When the appropriate bit is set, if the packet received w
hashing function is received without being filtered.
When the appropriate
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
0 (0x00): MTR0
1 (0x02): MTR1
ppropriate bit is cleared, the packet will drop.
addresses are received regardless of the multicast table value.
on is received without being filtered.
ropriate bit is set, if the packet received with DA matches the CRC, the
e receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
65
bit is cleared, the packet will drop.
tatus will be set, and Early Receive interrupt will be asserted
rupt condition.
eared, the packet will drop.
A) or receive multicast (RXRM) bit is set in the RXCR,
is value is defined as the six most significant bits from
ration is assumed.
ith DA matches the CRC, the
ast table value.
KSZ8841-16/32 MQL/MVL
are
Rev 1.3