KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 57

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Bank 7 Wakeup Frame 3 Byte Mask 1 Register (0x06): WF3BM1
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 17th byte of
the Wake up frame 3. Setting bit 15 selects the 32nd byte of the Wake up frame 3.
B
15-0
Bank 7 Wakeup Frame 3 Byte Mask 2 Register (0x08): WF3BM2
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 33rd byte of
the Wake up frame 3. Setting bit 15 selects the 48th byte of the Wake up frame 3.
Bit
15-0
Bank 7 Wakeup Frame 3 Byte Mask 3 Register (0x0A): WF3BM3
This register contains the last 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 49th byte of
the Wake up frame 3. Setting bit 15 selects the 64th byte of the Wake up frame 3.
Bit
15-0
Bank 8 – 15: Reserved
Except Bank Select Register (0xE).
Bank 16 Transmit Control Register (0x00): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
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Bit
15
14-13
12-4
3
2
it
Default Value
0
Default Value
0
Default Value
0
De
-
0x0
-
0x0
0x0
fault Value
R/W
RW
R/W
RW
R/W
RW
R/W
RO
RW
RO
RW
RW
Reserved.
Description
WF3BM1
Wake up Frame 3 Byte Mask 1
The next 16 bytes mask covering bytes 17 to 32 of a Wake up frame 3 pattern.
Description
WF3BM2
Wake up Frame 3 Byte Mask 2
The next 16 bytes mask covering bytes 33 to 48 of a Wake up frame 3 pattern.
Description
WF3BM3
Wake up Frame 3 Byte Mask 3.
The last 16 bytes mask covering bytes 49 to 64 of a Wake up frame 3 pattern.
Description
Reserved.
Reserved.
TXFCE Transmit Flow Control Enable
When this bit is set and the KSZ8841M is in full-duplex mode, flow control is enabled.
The KSZ8841M transmits a PAUSE frame when the
a threshold le
When this
control is enabled. When this bit is clear
TXPE Transmit Padding Enable
When this bit is set, the KSZ8841M automatically adds a padding field to a packet
shorter than 64 bytes.
bit
vel that will cause the buffer to overflow.
is set and the KSZ8841M is in half-duplex mode, back-pressure flow
57
ed, no transmit flow control is enabled.
Receive Buffer capacity reaches
KSZ8841-16/32 MQL/MVL
Rev 1.3