KSZ8841-16 Micrel Semiconductor, KSZ8841-16 Datasheet - Page 50

• Manufacturer Part Number: KSZ8841-16
• Description: Single-port Ethernet Mac Controller With Non-pci Interface
• Manufacturer: Micrel Semiconductor

Bank 3 Memory BIST Info Register (0x04): MBIR
Bank 3 Global Reset Register (0x06): GRR
This register controls the global reset function with information programmed by the CPU.
This register is a read-only register
a
Bit
15
14
13
November 2005
Bank 3 Power Management Capa
Micrel Confidential
Bit
15-13
12
11
10-5
4
3
2-0
Bit
15-1
0
re
automa ally download
Default Value
0
1
0
Default Value
0x0
-
-
-
-
-
-
Default Value
0x0000
0
tic
R/W
RO
RO
RO
ed fr
R/W
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RW
om
Reserved
Reserved.
Configparam word of EEP
Description
Reserved.
TXMBF TX Me
When set, it in
TXMBFA TX Memory Bist Fail
When set, it indicates the Memory Built In Self T
RXMBF RX Mem
When set, it indicates the Memory Built In Self Test completion for the RX Memory
RXMBFA RX Memory Bist Fail
When set, it indicates the Memory Built In Se
Description
Reserved.
Global Soft Reset
= 1 software reset is active.
= 0 software r
Software re
(base address registers) remains una
bilities Register (0x08): PMCR
that provides information on the K8841M
Description
PME Support D3 (cold
This bit defaults to 0, so the KSZ8841M does not support D3(cold)
PME Support D3 (hot)
This bit is 1 only,it is indicating that the KSZ8841M can assert PME even
(PMEN pin 14) in D3(hot) power state.(see bit1:0 in PMCS register)
PME Support D2
If this bit is set, the wake-up signals will assert PME event (PMEN pin 14)
when the KSZ8841M is in D2 power state and PME_EN (see bit8 in PMCS
register) is set. Otherwise, the KSZ8841M does not assert PME event (PMEN
pin 14) when the KSZ8841M is in D2 power state.
The value of this bit is loaded from the PME_D2 bit of 0x6 in the serial
EEPROM (without an EEPROM, this bit defaults to 0).
set will affect PHY, MAC, QMU, DMA, and the switch core, only the BIU
eset is inactive.
dicates the Memory Built In Self Test completion for the TX Memory.
mory Bist Finish
ory Bist Finish
50
ROM , if pin EEEN is high (enabled EEPROM)
)
ffected by a software reset.
lf Test has failed.
power management capabilities. These bits
est has failed.
KSZ8841-16/32 MQL/MVL
t
.
Rev 1.3