LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 16

• Manufacturer Part Number: LPC2925
• Description: (LPC2921 - LPC2925) ARM9 microcontroller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
www.DataSheet4U.com
6.8 Flash memory controller
Table 7.
[1]
[2]
[3]
[4]
Table 8.
The flash memory has a 128-bit wide data interface and the flash controller offers two
128-bit buffer lines to improve system performance. The flash has to be programmed
initially via JTAG. In-system programming must be supported by the bootloader. Flash
memory contents can be protected by disabling JTAG access. Suspension of burning or
erasing is not supported.
The Flash Memory Controller (FMC) interfaces to the embedded flash memory for two
tasks:
The key features are:
Base clock
BASE_UART_CLK
BASE_ICLK0_CLK
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
reserved
BASE_ICLK1_CLK
Base clock
BASE_OUT_CLK
BASE_USB_CLK
•
•
This clock is always on (cannot be switched off for system safety reasons)
In the peripheral subsystem parts of the Timers, watchdog timer, SPI and UART have their own clock
source. See
In the Power Clock and Reset Control subsystem parts of the CGU, RGU, and PMU have their own clock
source. See
The clock should remain activated when system wake-up on timer or UART is required.
Memory data transfer
Memory configuration via triggering, programming, and erasing
Base clock and branch clock overview
CGU1 base clock and branch clock overview
Section 6.12
Section 6.15
Rev. 00.01 — 24 October 2008
for details.
for details.
Branch clock name
CLK_UART0
CLK_UART1
-
CLK_SPI0
CLK_SPI1
CLK_SPI2
CLK_TMR0
CLK_TMR1
CLK_TMR2
CLK_TMR3
CLK_ADC1
CLK_ADC2
-
-
Branch clock name
CLK_OUT_CLK
CLK_USB_CLK
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
…continued
Parts of the device clocked
by this branch clock
UART 0 interface clock
UART 1 interface clock
clock for CGU1 input
SPI 0 interface clock
SPI 1 interface clock
SPI 2 interface clock
Timer 0 clock for counter part
Timer 1 clock for counter part
Timer 2 clock for counter part
Timer 3 clock for counter part
Control of ADC 1, capture
sample result
Control of ADC 2, capture
sample result
-
clock for CGU1 input
Parts of the device clocked
by this branch clock
clock out pin
USB clock
© NXP B.V. 2008. All rights reserved.
Remark
Remark
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