LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 25

• Manufacturer Part Number: LPC2925
• Description: (LPC2921 - LPC2925) ARM9 microcontroller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
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6.12.3.1 Pin description
6.12.3.2 Clock description
6.12.4 UARTs
The timers are designed to count cycles of the clock and optionally generate interrupts or
perform other actions at specified timer values, based on four match registers. They also
include capture inputs to trap the timer value when an input signal changes state,
optionally generating an interrupt. The core function of the timers consists of a 32 bit
prescale counter triggering the 32 bit timer counter. Both counters run on clock
CLK_TMRx (x runs from 0 to 3) and all time references are related to the period of this
clock. Note that each timer has its individual clock source within the Peripheral
SubSystem. In the Modulation and Sampling SubSystem each timer also has its own
individual clock source. See section
clocks.
The four timers in the peripheral subsystem of the LPC2921/2923/2925 have the pins
described below. The two timers in the modulation and sampling subsystem have no
external pins except for the pause pin on MSCSS timer 1. See
description of these timers and their associated pins. The timer pins are combined with
other functions on the port pins of the LPC2921/2923/2925, see
Table 13
Table 13.
[1]
The timer modules are clocked by two different clocks; CLK_SYS_PESS and CLK_TMRx
(x = 0-3), see
power management. The frequency of all these clocks is identical as they are derived
from the same base clock BASE_CLK_TMR. The register interface towards the system
bus is clocked by CLK_SYS_PESS. The timer and prescale counters are clocked by
CLK_TMRx.
The LPC2921/2923/2925 contains two identical UARTs located at different peripheral
base addresses. The key features are:
Symbol
TIMERx CAP[0]
TIMERx CAP[1]
TIMERx CAP[2]
TIMERx CAP[3]
TIMERx MAT[0]
TIMERx MAT[1]
TIMERx MAT[2]
TIMERx MAT[3]
•
– Set LOW on match
– Set HIGH on match
– Toggle on match
– Do nothing on match
Pause input pin (MSCSS timers only)
Note that CAP0 and CAP1 are not pinned out on Timer1.
shows the timer pins (x runs from 0 to 3).
Timer pins
Section
MATx[0]
MATx[1]
MATx[2]
MATx[3]
Pin name
CAPx[0]
CAPx[1]
CAPx[2]
CAPx[3]
Rev. 00.01 — 24 October 2008
6.7.2. Note that each timer has its own CLK_TMRx branch clock for
Direction
IN
IN
IN
IN
OUT
OUT
OUT
OUT
Section 6.15.5
Description
TIMER x capture input 0
TIMER x capture input 1
TIMER x capture input 2
TIMER x capture input 3
TIMER x match output 0
TIMER x match output 1
TIMER x match output 2
TIMER x match output 3
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
for information on generation of these
Section 6.14.6
Section
© NXP B.V. 2008. All rights reserved.
6.11.3. Table
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