LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 23

• Manufacturer Part Number: LPC2925
• Description: (LPC2921 - LPC2925) ARM9 microcontroller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
www.DataSheet4U.com
6.11.4.1 Pin description
6.12.1 Peripheral subsystem clock description
6.12.2 Watchdog timer
6.12 Peripheral subsystem
The event router module in the LPC2921/2923/2925 is connected to the pins listed below.
The pins are combined with other functions on the port pins of the LPC2921/2923/2925.
Table 12
Table 12.
The peripheral subsystem is clocked by a number of different clocks:
The purpose of the watchdog timer is to reset the ARM9 processor within a reasonable
amount of time if the processor enters an error state. The watchdog generates a system
reset if the user program fails to trigger it correctly within a predetermined amount of time.
Key features:
Symbol
EXTINT 0 - 3
CAN0 RXD
CAN1 RXD
I2C0_SCL
I2C1_SCL
USB_D+
LIN0 RXD
LIN1 RXD
SPI0 SDI
SPI1 SDI
SPI2 SDI
UART0 RXD
UART1 RXD
-
-
-
•
•
•
•
•
•
•
•
CLK_SYS_PESS
CLK_UART0/1
CLK_SPI0/1/2
CLK_TMR0/1/2/3
CLK_SAFE see
Internal chip reset if not periodically triggered
Timer counter register runs on always-on safe clock
Optional interrupt generation on watchdog time-out
shows the pins connected to the event router.
Event-router pin connections
I
I
I
I
I
I
I
Direction
I
I
I
I
I
I
na
na
na
Section 6.7.2
Rev. 00.01 — 24 October 2008
Description
external interrupt input 0 - 3
CAN0 receive data input wake-up
CAN1 receive data input wake-up
I2C0 SCL clock input
I2C1 SCL clock input
USB D+ data input
LIN0 receive data input wake-up
LIN1 receive data input wake-up
SPI0 receive data input
SPI1 receive data input
SPI2 receive data input
UART0 receive data input
UART1 receive data input
CAN interrupt (internal)
VIC FIQ (internal)
VIC IRQ (internal)
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
© NXP B.V. 2008. All rights reserved.
Default polarity
1
0
0
0
0
<tbd>
0
0
0
0
0
0
0
1
1
1
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