ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 32

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
4 Hardware Architecture
Operation of the ECCP
To operate the ECCP, the user first programs its mode of operation by setting the control register, ECON, the tra-
ceback length register, TBLR, and appropriately initializing the present state accumulated costs. The complete Vit-
erbi decoding operation is achieved by recursively loading the received symbols into the ECCP, executing the ECCP
with an UpdateMLSE, an UpdateConv, or a TraceBack instruction, and unloading the decoded symbol from the
ECCP. The operation of the ECCP is captured in the signal flow diagram in Figure 8.
30
TBLR BY ONE
DECREMENT
ADAPTED
CHANNEL
NEW
?
YES
FETCH MINIMUM COST INDEX
YES
NO
DECODED SYMBOL
REVERSED PATH
CALCULATE
TRACEBACK
NO
TL = TL – 1
TL = TBLR
TL = 0?
INSTR.
OUTPUT
IS
IS
?
YES
NO
(continued)
Figure 9. ECCP Operation Sequence
DSP LOADS CHANNEL/GENERATING
POLYNOMIALS INTO THE ECCP
COMPLETE
DECODING
DECODED
SYMBOLS
VITERBI
SYMBOLS INTO THE ECCP
DSP PROGRAMS ECCP
UPDATE INSTRUCTION
DSP LOADS RECEIVED
ALL
?
YES
DSP EXECUTES
NO
FOR BOTH STATE TRANSITIONS TO K
NO
CALCULATE ACCUMULATED COST
SELECT MINIMUM ACCUMULATED
FOR STATE TRANSITIONS TO K
UPDATE MINIMUM COST INDEX
CALCULATE BRANCH METRIC
COST AS SURVIVOR PATH
STORE SURVIVOR PATH
INCREMENT
K < 2
SET K = 0
K BY ONE
Lucent Technologies Inc.
IS
(C – 1)
?
– 1
February 1997
YES
5-4502(F)