ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 56

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
5 Software Architecture
Data Move Instructions
Data move instructions normally execute in two instruction cycles. (If PC or rM point to external memory, any pro-
grammed wait-states must be added. In addition, if PC and rM point to the same bank of DPRAM, then one cycle
must be added.) Immediate data move instructions require two words of program memory; all other data move in-
structions require only one word. The only exception to these statements is a special case immediate load (short
immediate) instruction. If a YAAU register is loaded with a 9-bit short immediate value, the instruction requires only
one word of memory and executes in one instruction cycle. All data move instructions, except those doing long im-
mediate loads, can be executed from within the cache. The data move instructions are as follows:
Table 25. Replacement Table for Data Move Instructions
Notes:
sioc, sioc2, tdms, tdms2, srta, and srta2 registers are not readable.
When signed registers less than 16 bits wide (c0, c1, c2) are read, their contents are sign-extended to 16 bits. When unsigned registers less
than 16 bits wide are read, their contents are zero-extended to 16 bits.
Loading an accumulator with a data move instruction does not affect the flags.
54
OFFSET
Replace
aS, aT
IM16
IM9
DR
SR
R
Y
Z
R = IM16
aT[l] = R
SR = IM9
Y = R
R = Y
Z : R
R = aS[l]
DR = * (OFFSET)
* (OFFSET) = DR
Any of the registers in Table 55
r<0—3>, a0[l], a1[l], y[l], p, pl, x,
pt, pr, psw
a0, a1
* rM, * rM++, * rM--, * rM++j
* rMzp, * rMpz, * rMm2, * rMjk
16-bit value
9-bit value
5-bit value from instruction
11-bit value in base register
r<0—3>, rb, re, j, k
Value
(continued)
Subset of registers accessible with direct addressing.
High half of accumulator.
Same as in multiply/ALU instructions.
Same as in multiply/ALU instructions.
Long immediate data.
Short immediate data for YAAU registers.
Value in bits [15:5] of ybase register form the 11 most significant
bits of the base address. The 5-bit offset is concatenated to this
to form a 16-bit address.
Subset of registers for short immediate.
Meaning
—
Lucent Technologies Inc.
February 1997