ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 51

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

February 1997
5 Software Architecture
Control Instructions
All control instructions executed unconditionally execute in two cycles, except icall which takes three cycles. Control
instructions executed conditionally execute in three instruction cycles. (If PC, pt, or pr point to external memory, add
programmed wait-states.) Control instructions executed unconditionally require one word of program memory, while
control instructions executed conditionally require two words. Control instructions cannot be executed from the
cache.
† The goto JA and call JA instructions should not be placed in the last or next-to-last instruction before the boundary of a 4 Kwords page. If the
‡ The icall instruction is reserved for development system use.
The above control instructions, with the exception of ireturn and icall, can be conditionally executed. For example:
Table 20. Replacement Table for Control Instructions
Lucent Technologies Inc.
goto or call is placed there, the program counter will have incremented to the next page and the jump will be to the next page, rather than to
the desired current page.
Replace
CON
JA
goto JA
goto pt
call JA
call pt
icall
return
ireturn
if le goto 0x0345
mi, pl, eq, ne, gt, le, nlvs, lvc, mvs, mvc, c0ge, c0lt,
c1ge, c1lt, heads, tails, true, false, allt, allf, somet,
somef, oddp, evenp, mns1, nmns1, npint, njint, lock,
ebusy
12-bit value
‡
†
†
(goto pr)
(goto pi)
(continued)
Value
See Table 21 for definitions of mnemonics.
Least significant 12 bits of absolute address
within the same 4 Kwords memory section.
DSP1628 Digital Signal Processor
Meaning
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