ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 60

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
5 Software Architecture
Table 30. Processor Status Word (psw) Register
* The DAU flags can be set by either BMU or DAU operations.
Table 31. Arithmetic Unit Control (auc) Register
† The auc is 9 bits [8:0]. The upper 7 bits [15:9] are always zero when read and should always be written with zeros to make the program
58
Field
compatible with future chip versions. The auc register is cleared at reset.
Field
Bit
Bit
DAU FLAGS*
a1[35:32]
a0[35:32]
Field
a1[V]
a0[V]
ALIGN
RAND
X=Y=
Field
CLR
SAT
15
RAND
DAU FLAGS
8
14
13
X=Y=
7
Value
Wxxx
xWxx
xxWx
xxxW
Wxxx
xWxx
xxWx
xxxW
Wxxx
xWxx
xxWx
xxxW
12
W
W
Value
1xx
x1x
xx1
00
01
10
11
1x
x1
0
1
0
1
11
(continued)
X
6
10
X
LMI—logical minus when set (bit 35 = 1).
LEQ—logical equal when set (bit [35:0] = 0).
LLV—logical overflow when set.
LMV—mathematical overflow when set.
Accumulator 1 (a1) overflow when set.
Accumulator 1 (a1) bit 35.
Accumulator 1 (a1) bit 34.
Accumulator 1 (a1) bit 33.
Accumulator 1 (a1) bit 32.
Accumulator 0 (a0) overflow when set.
Accumulator 0 (a0) bit 35.
Accumulator 0 (a0) bit 34.
Accumulator 0 (a0) bit 33.
Accumulator 0 (a0) bit 32.
a1[V]
9
Pseudorandom sequence generator (PSG) reset by writing the
pi register only outside an interrupt service routine.
PSG never reset by writing the pi register.
Normal operation.
All instructions which load the high half of the y register also
load the x register, allowing single-cycle squaring with p = x * y.
Clearing yl is disabled (enabled when 0).
Clearing a1l is disabled (enabled when 0).
Clearing a0l is disabled (enabled when 0).
a1 saturation on overflow is disabled (enabled when 0).
a0 saturation on overflow is disabled (enabled when 0).
a0, a1
a0, a1
a0, a1
a0, a1
CLR
5
†
8
a1[35:32]
p.
p/4.
p x 4 (and zeros written to the two LSBs).
p x 2 (and zero written to the LSB).
7
4
6
Description
5
a0[V]
3
Description
4
SAT
3
2
a0[35:32]
2
1
Lucent Technologies Inc.
0
1
February 1997
ALIGN
0