mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 159

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Figure 5-2 shows PSTCLK timing.
5.2.1 Processor Status/Debug Data (PSTDDATA[7:0])
Processor status data outputs are used to indicate both processor status and captured address
and data values. They operate at half the processor’s frequency. Given that real-time trace
information appears as a sequence of 4-bit data values, there are no alignment restrictions;
that is, the processor status (PST) values and operands may appear on either nibble of
PSTDDATA[7:0]. The upper nibble (PSTDDATA[7:4]) is the most significant.
CSR controls capturing of data values. Executing the WDDATA instruction captures data
displayed on PSTDDATA. These signals are updated each processor cycle and displayed
two values at a time for two processor clock cycles. Table 5-2 shows the PSTDDATA output
for the processor’s sequential execution of single-cycle instructions (A, B, C, D...). Cycle
counts are shown relative to processor frequency. These outputs indicate the current
processor pipeline status and are not related to the current bus transfer.
The signal timing for the example in Table 5-2 is shown in Figure 5-3.
Table 5-2. PSTDDATA: Sequential Execution of Single-Cycle Instructions
PSTDDATA
PSTDDATA
PSTCLK
PSTCLK
PCLK
Figure 5-3. PSTDDATA: Single-Cycle Instruction Timing
Cycle
T+1
T+2
T+3
T+4
T+5
Figure 5-2. PSTCLK Timing
T
Chapter 5. Debug Support
{A, B}
{PST for A, PST for B}
{PST for A, PST for B}
{PST for C, PST for D}
{PST for C, PST for D}
{PST for E, PST for F}
{PST for E, PST for F}
PSTDDATA[7:0]
{C, D}
{E, F}
Signal Descriptions
5-3