mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 63
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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Intended Audience
Part I is intended for system designers who need a general understanding of the
functionality supported by the MCF5407. It also describes the operation of the MCF5407
ColdFire core and its multiply/accumulate (MAC) execution unit. It describes the
programming and exception models, Harvard memory implementation, and debug module.
Contents
• Chapter 2, “ColdFire Core,” provides an overview of the microprocessor core of the
• Chapter 3, “Hardware Multiply/Accumulate (MAC) Unit,” describes the MCF5407
• Chapter 4, “Local Memory.” This chapter describes the MCF5407 implementation
MCF5407. The chapter begins with a description of enhancements from the V3
ColdFire core, and then fully describes the V4 programming model as it is
implemented on the MCF5407. It also includes a full description of exception
handling, data formats, an instruction set summary, and a table of instruction
timings.
multiply/accumulate unit, which executes integer multiply, multiply-accumulate,
and miscellaneous register instructions. The MAC is integrated into the operand
execution pipeline (OEP).
of the ColdFire V4 local memory specification. It consists of the two following
major sections.
— Section 4.2, “SRAM Overview,” describes the MCF5407 on-chip static RAM
— Section 4.7, “Cache Overview,” describes the MCF5407 cache implementation,
(SRAM) implementation. It covers general operations, configuration, and
initialization. It also provides information and examples showing how to
minimize power consumption when using the SRAM.
including organization, configuration, and coherency. It describes cache
operations and how the cache interacts with other memory structures.
Part I. MCF5407 Processor Core
MCF5407 Processor Core
Part I
I-xix
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