mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 71

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

2.1.2.2.1 Illegal Opcode Handling
To aid in conversion from M68000 code, every 16-bit operation word is decoded to ensure
that each instruction is valid. If the processor attempts execution of an illegal or
unsupported instruction, an illegal instruction exception (vector 4) is taken.
2.1.2.2.2 Hardware Multiply/Accumulate (MAC) Unit
The MAC is an optional unit in Version 4 that provides hardware support for a limited set
of digital signal processing (DSP) operations used in embedded code, while supporting the
integer multiply instructions in the ColdFire microprocessor family. The MAC features a
three-stage execution pipeline, optimized for 16 x 16 multiplies. It is tightly coupled to the
OEP, which can issue a 16 x 16 multiply with a 32-bit accumulation plus fetch a 32-bit
operand in a single cycle. A 32 x 32 multiply with a 32-bit accumulation requires three
cycles before the next instruction can be issued.
Figure 2-2 shows basic functionality of the MAC. A full set of instructions are provided for
signed and unsigned integers plus signed, fixed-point fractional input operands.
The MAC provides functionality in the following three related areas, which are described
in detail in Chapter 3, “Hardware Multiply/Accumulate (MAC) Unit.”
• Instruction folding involving MOVE instructions allows two instructions to be
• Signed and unsigned integer multiplies
• Multiply-accumulate operations with signed and unsigned fractional operands
• Miscellaneous register operations
issued in one cycle. The resulting microarchitecture approaches full superscalar
performance at a much lower silicon cost.
Figure 2-2. ColdFire Multiply-Accumulate Functionality Diagram
Operand Y
Chapter 2. ColdFire Core
Accumulator
Shift 0,1,-1
+/-
X
Operand X
Features and Enhancements
2-5