mt48lc4m32b2tg-7-it Micron Semiconductor Products, mt48lc4m32b2tg-7-it Datasheet - Page 26

• Manufacturer Part Number: mt48lc4m32b2tg-7-it
• Description: 128mb X32 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 15:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. K 9/07 EN
Terminating a READ Burst
Notes:
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts.
Full-page READ bursts can be truncated with the BURST TERMINATE command, and
fixed-length READ bursts may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which the last desired data element is
valid, where x = CL - 1. This is shown in Figure 15 for each possible CL; data element n +
3 is the last desired data element of a longer burst.
COMMAND
COMMAND
1. DQM is LOW.
COMMAND
ADDRESS
ADDRESS
ADDRESS
CLK
CLK
CLK
DQ
DQ
DQ
BANK,
BANK,
COL n
COL n
T0
T0
T0
BANK,
COL n
READ
READ
READ
CL = 1
CL = 2
T1
T1
T1
NOP
NOP
NOP
D
OUT
CL = 3
n
T2
T2
T2
NOP
NOP
NOP
D
D
n + 1
OUT
OUT
n
26
T3
T3
T3
NOP
NOP
NOP
D
n + 2
D
n + 1
D
OUT
OUT
OUT
n
TERMINATE
TERMINATE
TERMINATE
BURST
BURST
BURST
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T4
T4
T4
X = 0 cycles
X = 1 cycle
D
D
n + 3
n + 2
D
n + 1
OUT
OUT
OUT
X = 2 cycles
T5
T5
T5
NOP
NOP
NOP
D
n + 3
D
n + 2
OUT
OUT
T6
T6
T6
NOP
NOP
NOP
D
n + 3
OUT
DON’T CARE
T7
NOP
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
Register Definition