mt48lc4m32b2tg-7-it Micron Semiconductor Products, mt48lc4m32b2tg-7-it Datasheet - Page 49
mt48lc4m32b2tg-7-it
Manufacturer Part Number
mt48lc4m32b2tg-7-it
Description
128mb X32 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48LC4M32B2TG-7-IT.pdf
(66 pages)
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Timing Diagrams
Figure 33:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. K 9/07 EN
COMMAND
A0-A9, A11
BA0, BA1
DQM 0-3
CKE
A10
CLK
DQ
T = 100µs
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Power-up:
V
CK stable
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DD
Initialize and Load Mode Register
and
t CKS
t CMS
T0
Notes:
NOP
t CKH
High-Z
t CMH
SINGLE BANK
t CMS
ALL BANKS
t CK
1. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
2. Outputs are guaranteed High-Z after command is issued.
PRECHARGE
BANKS
T1
ALL
t CMH
Precharge
all banks
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t RP
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t CMS
Tn + 1
REFRESH
AUTO
t CMH
t CH
AUTO REFRESH
NOP
t RFC
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NOP
49
t CL
To + 1
REFRESH
AUTO
AUTO REFRESH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
t RFC
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NOP
t AS
t AS
LOAD MODE
Tp + 1
REGISTER
CODE
CODE
t AH
t AH
Program Mode Register
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
t MRD
Tp + 2
Timing Diagrams
NOP
1, 2
Tp + 3
ACTIVE
BANK
ROW
ROW
DON’T CARE
UNDEFINED
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