mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 132

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
10.2 Introduction
Technical Data
130
10.8
10.8.1
10.8.2
10.8.3
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. The SIM is a system
state controller that coordinates CPU and exception timing. Together
with the central processor unit (CPU), the SIM controls all MCU
activities. A block diagram of the SIM is shown in
Figure 10-2
The SIM is responsible for:
Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and
computer operating properly (COP) timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
System Integration Module (SIM)
SIM Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . 147
SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . 148
SIM Break Flag Control Register. . . . . . . . . . . . . . . . . . . .150
is a summary of the SIM input/output (I/O) registers.
Figure
Freescale Semiconductor
MC68HC08QA24
10-1.

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