mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 371

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

22.14.4 MSCAN08 Bus Timing Register 1
MC68HC08QA24
Freescale Semiconductor
Address:
SAMP — Sampling Bit
TSEG22–TSEG20 and TSEG13–TSEG10 — Time Segment Bits
Reset:
Read:
Write:
This bit determines the number of serial bus samples to be taken per
bit time. If set, three samples per bit are taken, the regular one
(sample point) and two preceding samples, using a majority rule. For
higher bit rates, SAMP should be cleared, which means that only one
sample will be taken per bit.
Time segments within the bit time fix the number of clock cycles per
bit time and the location of the sample point.
Time segment 1 (TSEG1) and time segment 2 (TSEG2) are
programmable as shown in
Time Segment
1 = Three samples per bit
0 = One sample per bit
Transmit point
Sample point
SYNC_SEG
Figure 22-17. CAN Bus Timing Register 1 (CBTR1)
$0503
SAMP
Bit 7
0
TSEG22
CAN Controller
6
0
Table 22-6. Time Segment Syntax
System expects transitions to occur on the bus during this
A node in transmit mode will transfer a new value to the CAN
A node in receive mode will sample the bus at this point. If
period.
bus at this point.
the three samples per bit option are selected, then this
point marks the position of the third sample.
TSEG21
5
0
Table 22-7
TSEG20
4
0
TSEG13
and
3
0
Action
Table
TSEG12
2
0
22-8, respectively.
TSEG11
CAN Controller
1
0
Technical Data
TSEG10
Bit 0
0
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