mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 328

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface B (TIMB)
Technical Data
326
NOTE:
Address:
TOF — TIMB Overflow Flag Bit
TOIE — TIMB Overflow Interrupt Enable Bit
TSTOP — TIMB Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIMB is
required to exit wait mode.
Reset:
Read:
Write:
This read/write flag is set when the TIMB counter resets to $0000 after
reaching the modulo value programmed in the TIMB counter modulo
registers. Clear TOF by reading the TIMB status and control register
when TOF is set and then writing a logic 0 to TOF. If another TIMB
overflow occurs before the clearing sequence is complete, then
writing logic 0 to TOF has no effect. Therefore, a TOF interrupt
request cannot be lost due to inadvertent clearing of TOF. Reset
clears the TOF bit. Writing a logic 1 to TOF has no effect.
This read/write bit enables TIMB overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
This read/write bit stops the TIMB counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIMB
counter until software clears the TSTOP bit.
1 = TIMB counter has reached modulo value
0 = TIMB counter has not reached modulo value
1 = TIMB overflow interrupts enabled
0 = TIMB overflow interrupts disabled
1 = TIMB counter stopped
0 = TIMB counter active
Figure 21-4. TIMB Status and Control Register (TBSC)
$002C
Bit 7
TOF
R
0
0
Timer Interface B (TIMB)
= Reserved
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
R
3
0
0
PS2
Freescale Semiconductor
2
0
MC68HC08QA24
PS1
1
0
Bit 0
PS0
0

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