mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 156

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Low-Voltage Inhibit (LVI)
11.6 LVI Interrupts
11.7 Wait Mode
Technical Data
154
LVIOUT — LVI Output Bit
The LVI module does not generate interrupt requests.
The WAIT instruction puts the MCU in low power-consumption standby
mode.
With the LVIPWR bit in the configuration register programmed to logic 0,
the LVI module is active after a WAIT instruction.
With the LVIRST bit in the configuration register programmed to logic 0,
the LVI module can generate a reset and bring the MCU out of wait
mode.
This read-only flag becomes set when the V
LVI
Reset clears the LVIOUT bit.
TRIPF
LVI
V
V
V
V
DD
DD
DD
DD
TRIPF
at Level:
LVI
voltage for 32 to 40 CGMXCLK cycles. (See
> LVI
< LVI
< LVI
< LVI
V
TRIPR
Low-Voltage Inhibit (LVI)
DD
< V
TRIPR
TRIPF
TRIPF
TRIPF
DD
Table 11-1. LVIOUT Bit Indication
<
< 32 CGMXCLK cycles
> 40 CGMXCLK cycles
CGMXCLK Cycles:
CGMXCLK cycles
Between 32 & 40
For Number of
Any
Any
DD
voltage falls below the
Freescale Semiconductor
Previous value
Table
MC68HC08QA24
LVIOUT
0 or 1
0
0
1
11-1.)

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