mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 70

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Mask Options
5.4 Mask Option Register
Technical Data
68
NOTE:
Address: $001F
The mask option register ($001F) is used in the initialization of various
options. For error-free compatibility with the emulator one time
programmable (OTP) M68HC908QA24, a write to $001F in the
MC68HC08QA24has no effect in MCU operation.
LVISTOP — LVI Stop Mode Enable Bit
To have the LVI enabled in stop mode, the LVIPWR must be at a logic 0
and the LVISTOP bit must be at a logic 1. Take note that by enabling the
LVI in stop mode, the stop I
ROMSEC — ROM Security Bit
Reset:
Read: LVISTOP ROMSEC
Write:
LVISTOP enables the LVI module in stop mode. (See
Low-Voltage Inhibit
ROMSEC enables the ROM security feature. Setting the ROMSEC bit
prevents reading of the ROM contents. Access to the ROM is denied
to unauthorized users of customer specified software.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = ROM security enabled
0 = ROM security disabled
STOP instruction
Computer operating properly module (COP)
Bit 7
R
R
Figure 5-1. Mask Option Register (MOR)
= Reserved
R
6
Mask Options
LVIRST
(LVI).)
R
5
DD
current will be higher.
LVIPWR
Unaffected by reset
R
4
SSREC
R
3
COPS
Freescale Semiconductor
R
2
MC68HC08QA24
STOP
Section 11.
R
1
COPD
Bit 0
R

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