mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 169

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

13.4.2 Data Format
MC68HC08QA24
Freescale Semiconductor
BREAK
$A5
START
BIT
START
START
BIT
BIT
BIT 0
BIT 0
BIT 0
Table 13-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 Kbaud. Transmit and receive baud rates must be identical.
Monitor
1. If the high voltage (V
Modes
BIT 1
Figure 13-3. Sample Monitor Waveforms
User
SIM asserts its COP enable output. The COP is a mask option enabled or disabled by the
COPD bit in the configuration register. (See
BIT 1
BIT 1
Figure 13-2. Monitor Data Format
BIT 2
Disabled
BIT 2
BIT 2
Enabled
is a summary of the differences between user mode and
COP
BIT 3
Monitor ROM (MON)
BIT 3
BIT 3
(1)
DD
Table 13-2. Mode Differences
BIT 4
+ V
Vector
$FFFE
$FEFE
Reset
BIT 4
BIT 4
High
HI
) is removed from the IRQ/V
BIT 5
BIT 5
BIT 5
Vector
$FEFF
$FFFF
Reset
Low
BIT 6
BIT 6
BIT 6
Functions
23.5 DC Electrical Characteristics
Figure 13-2
Vector
$FFFC
$FEFC
BIT 7
Break
High
BIT 7
BIT 7
STOP
BIT
PP
STOP
STOP
$FEFD
Vector
$FFFD
Break
pin while in monitor mode, the
BIT
BIT
Low
and
START
NEXT
BIT
START
START
NEXT
NEXT
BIT
BIT
Monitor ROM (MON)
Figure
Vector
$FFFC
$FEFC
High
SWI
Technical Data
13-3.)
.)
$FEFD
Vector
$FFFD
Low
SWI
167