mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 376

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

CAN Controller
22.14.7 MSCAN08 Transmitter Flag Register
Technical Data
374
Address:
OVRIE — Overrun Interrupt Enable Bit
RXFIE — Receiver Full Interrupt Enable Bit
All bits of this register are read and clear only. A flag can be cleared by
writing a 1 to the corresponding bit position. Writing a 0 has no effect on
the flag setting. Every flag has an associated interrupt enable flag in the
CTCR register. A hard or soft reset will clear the register.
ABTAK2–ABTAK0 — Abort Acknowledge Flag
Reset:
Read:
Write:
This flag acknowledges that a message has been aborted due to a
pending abort request from the CPU. After a particular message
buffer has been flagged empty, this flag can be used by the
application software to identify whether the message has been
aborted successfully or has been sent. The flag is reset implicitly
whenever the associated TXE flag is set to 0.
1 = An overrun event will result in an error interrupt.
0 = No interrupt will be generated from this event.
1 = A receive buffer full (successful message reception) event will
0 = No interrupt will be generated from this event.
1 = The message has been aborted.
0 = The message has not been aborted, thus has been sent out.
Figure 22-20. CAN Transmitter Flag Register (CTFLG)
$0506
Bit 7
result in a receive interrupt.
R
R
0
0
= Reserved
ABTAK2
CAN Controller
R
6
0
ABTAK1
R
5
0
ABTAK0
R
4
0
R
3
0
0
TXE2
Freescale Semiconductor
2
1
MC68HC08QA24
TXE1
1
1
TXE0
Bit 0
1