mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 309

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mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC08QA24
Freescale Semiconductor
NOTE:
NOTE:
Before enabling a TIMA channel register for input capture operation,
make sure that the PTEx/TACHx pin is stable for at least two bus clocks.
TOVx — Toggle-On-Overflow Bit
When TOVx is set, a TIMA counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
PTEx/TCHx
CHxMAX
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIMA counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
When the TOVx bit is at logic 0, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100 percent. As
Figure 20-8
is set or cleared. The output stays at the 100 percent duty cycle level
until the cycle after CHxMAX is cleared.
1 = Channel x pin toggles on TIMA counter overflow.
0 = Channel x pin does not toggle on TIMA counter overflow.
OVERFLOW
Timer Interface A (TIMA)
COMPARE
shows, the CHxMAX bit takes effect in the cycle after it
PERIOD
OUTPUT
Figure 20-8. CHxMAX Latency
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
Timer Interface A (TIMA)
COMPARE
OUTPUT
Technical Data
OVERFLOW
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