pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 114

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

4.5.2.1
The pulse length of SYPX is always the basic E1 bit width (488 ns), independent of the
selected system highway clock and data frequency.
SYPX Offset Calculation
T:
SD:
SC:
X:
0 ≤T ≤4:
5 ≤T ≤T
User’s Manual
Hardware Description
max
Time between beginning of SYPX pulse and beginning of next frame
(time slot 0, bit 0), measured in number of SCLKX clock intervals
maximum delay: T
Basic data rate; 2.048 Mbit/s
System clock rate; 2.048, 4.096, 8.192, or 16.384 MHz
Programming value to be written to registers XC0 and XC1 (see
:
Transmit Offset Programming
X = 4 - T
X = 256 × SC/SD - T + 4
max
= (256 × SC/SD) - 1
114
Functional Description E1
DS1.1, 2003-10-23
PEF 2256 H/E
Page
FALC
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