pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 39

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Table 4
Pin or
Ball No.
67 (D6)
68 (A6)
69 (B5)
70 (D5)
User’s Manual
Hardware Description
Name
RPA
RPB
RBC
RPD
Pin Definitions - System Interface (cont’d)
Pin
Type
I
Buffer
Type
PU
Function
Receive Multifunction Ports
Depending on programming of bits
PC(1:4).RPC(3:0) these multifunction ports
carry information to the system interface or
from the system to the FALC
these ports are configured to be inputs. With
the selection of the appropriate pin function,
the corresponding input/output configuration
is achieved automatically. Depending on bit
SIC3.RESR latching/transmission of data is
done with the rising or falling edge of SCLKR.
The same input function must not be selected
twice or more. Selectable pin functions are
described below.
Synchronous Pulse Receive (SYPR)
PC(1:4).RPC(3:0) = 0000
Together with the values of registers RC(1:0)
this signal defines the beginning of time slot 0
on system highway port RDO. Only one
multifunction port may be selected as SYPR
input. After reset, SYPR of port A is used, the
other lines are ignored. SYPR cannot be used
in combination with RFM. The pulse cycle is
an integer multiple of 125 µs.
39
B
External Signals
DS1.1, 2003-10-23
®
PEF 2256 H/E
56. After reset
FALC
®
56

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