pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 393
pef2256e
Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF2256E.pdf
(518 pages)
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System Interface Control 3(Read/Write)
Value after reset: 00
SIC3
CMI
RTRI
FSCT
RESX
User’s Manual
Hardware Description
CMI
7
100 =
101 =
110 =
111 =
Select CMI Precoding
Only valid if CMI code (FMR0.XC(1:0) = 01) is selected. This bit
defines
the CMI precoding and influences transmit and receive data.
0 =
1 =
RDO/RSIG Tri-state Mode
0
1
SEC/FSC Tri-state Mode
0
1
Rising Edge Synchronous Pulse Transmit
Depending on this bit all transmit system interface data and marker
are clocked or sampled with the selected active edge.
CMR2.IXSC = 0:
Note:Before local loop is closed, B8ZS precoding has to be switched
off.
CMI with B8ZS precoding
CMI without B8ZS precoding
During incative channel phases, RDO and RSIG are switched
During incative channel phases, RDO and RSIG are switched
SEC/FSC output is switched into tri-state mode.
to low output level.
into tri-state mode.
Normal operation.
Data active in channel phase 5, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 6, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 7, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 8, valid if data rate is 16 or
12 Mbit/s
RTRI
FSCT
393
RESX
RESR
TTRF
DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
DAF
0
FALC
(40)
®
56
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