pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 59

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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®
FALC
56
PEF 2256 H/E
Functional Description E1/T1/J1
3.3.3
Master Clocking Unit
®
The FALC
56 provides a flexible clocking unit, which references to any clock in the
range of 1.02 to 20 MHz supplied on pin MCLK.
The clocking unit has to be tuned to the selected reference frequency by setting the
global clock mode registers GCM(8:1) accordingly.
The calculation formulas for the appropriate register settings can be found in
Chapter 9.2
on
page 227
or
Chapter 10.2
on
page
348. A calculation tool is available
to evaluate the required register settings automatically (see
Chapter 13.3
on
page
501).
All required clocks for E1 or T1/J1 operation are generated by this circuit internally. The
global setting depends only on the selected master clock frequency and is the same for
E1 and T1/J1 because both clock rates are provided simultaneously.
To meet the E1 requirements the MCLK reference clock must have an accuracy of better
than ± 32 ppm. The synthesized clock can be controlled on pins CLK1, CLK2, RCLK,
SCLKR and XCLK.
.
Figure 11
Flexible Master Clock Unit
User’s Manual
59
DS1.1, 2003-10-23
Hardware Description

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