pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 26

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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2.4
This chapter describes the pin functions. There is no functional difference between
TQFP and BGA package. Pin numbers refer to the TQPP package while the ball
numbers refer to the BGA package.
2.4.1
Table 1
Pin or
Ball No.
50 (E6)
49 (E8)
48 (F9)
47 (F6)
46 (F8)
45 (G9)
44 (F7)
43 (G8)
21 (J1)
22 (J2)
23 (H3)
26 (H4)
27 (F4)
28 (J4)
29 (H5)
30 (F5)
31 (J5)
32 (G5)
33 (G6)
36 (H6)
37 (G7)
38 (H7)
39 (J8)
40 (H8)
User’s Manual
Hardware Description
Pin Description
Input/Output Signals
Name
A7
A6
A5
A4
A3
A2
A1
A0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Pin Definitions - Microprocessor Interface
Pin
Type
I
I/O
Buffer
Type
PU
PU
Function
Address Bus
These inputs interface with eight bits of the
system’s address bus to select one of the
internal registers for read or write.
Data Bus
Bidirectional tristate data lines which
interface with the system’s data bus. Their
configuration is controlled by the level of pin
DBW (Data Bus Width), output drivers are
controlled by WR/RW (Write enable or
Read/Write selection).
26
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56

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