pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 36

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Table 3
Pin or
Ball No.
78 (B3)
User’s Manual
Hardware Description
Name
SEC
FSC
Pin Definitions - Clock Interface (cont’d)
Pin
Type
I
O
O
Buffer
Type
PU
Function
One-Second Timer Reference Input
A pulse with logical high level for at least two
line clock cycles triggers the internal
one-second timer. After reset this pin is
configured to be an input. See register GPC1
for more detail.
One-Second Timer Output
Activated high once every second for the
duration of two line clock cycles.
Frame Synchronization Pulse
An 8-kHz Frame Synchronization Pulse is
output on this pin. The synchronization pulse
is active high or active low for one
2.048/1.544 MHz cycle ( E1 or T1/J1). FSC
can be switched into tri-state mode
(SIC3.FSCT)
36
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56

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