tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 121

• Manufacturer Part Number: tmp86fp24
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(1FE3H)
LCDCR
2.13.2 Control
Note 1: When <BRES>(Booster circuit control) is set to “0”, V
Note 2: When used as the booster circuit, the VLCD setting should be composed to 1/3 bias. Therefore, do not set
EDSP
display is enabled using the EDSP.
VFSEL
DUTY
EDSP
BRES
SLF
7
The LCD driver is controlled using the LCD control register (LCDCR). The LCD driver’s
When <BRES> is set to “1”, 3.6 [V] _ V
If these conditions are not satisfied, it not only affects the quality of LCD display but also may damage the
device due to over voltage of the port.
LCDCR<DUTY> to “10” or “11” when the booster circuit is enable.
BRES
LCD display control
Booster circuit control
Selection of boost frequency
Selection of driving methods
Selection of LCD frame
frequency
6
5
VFSEL
Figure 2.13.2 LCD Driver Control Register
4
3
86FP24-119
DUTY
00:
01:
10:
11:
00: 1/4 Duty (1/3 Bias)
01: 1/3 Duty (1/3 Bias)
10: 1/2 Duty (1/2 Bias)
11: Static
00:
01:
10:
11:
0: Blanking
1: Enables LCD display (Blanking is released)
0: Disable (Use divider resistance)
1: Enable
3
_ V
NORMAL1/2,IDLE0/1/2 Modes
NORMAL1/2,IDLE0/1/2 Modes
2
DV7CK  0
DV7CK  0
DD
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
should be satisfied.
13
11
10
17
16
15
13
9
1
DD
SLF
_ V
3
DV7CK  1
DV7CK  1
_ V
0
fc/2
fc/2
fs/2
fs/2
fs/2
fc/2
fs/2
fs/2
2
_ V
15
13
5
3
2
9
9
8
(Initial value: 0000 0000)
1
_ V
SS
SLOW1/2, SLEEP01/2
SLOW1/2, SLEEP01/2
should be satisfied.
Reserved
Reserved
Reserved
Modes
Modes
fs/2
fs/2
fs/2
fs/2
fs/2
5
3
2
9
8
TMP86FP24
2007-08-24
R/W